Intel 386 - Manual (Page 551)

Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL
C-2
#define OCW2SDOS 0x00A0
#define OCW3MDOS 0x0020
#define OCW3SDOS 0x00A0
/* CONFIGURATION Registers */
#define DMACFG 0xF830
#define INTCFG 0xF832
#define TMRCFG 0xF834
#define SIOCFG 0xF836
#define P1CFG 0xF820
#define P2CFG 0xF822
#define P3CFG 0xF824
#define PINCFG 0xF826
/* WATCHDOG TIMER Registers */
#define WDTRLDH 0xF4C0
#define WDTRLDL 0xF4C2
#define WDTCNTH 0xF4C4
#define WDTCNTL 0xF4C6
#define WDTCLR 0xF4C8
#define WDTSTATUS 0xF4CA
/* TIMER CONTROL REGISTERS -- SLOT 15 ADDRESSES */
#define TMR0 0xF040
#define TMR1 0xF041
#define TMR2 0xF042
#define TMRCON 0xF043
/* TIMER CONTROL REGISTERS -- SLOT 0 ADDRESSES */
#define TMR0DOS 0x0040
#define TMR1DOS 0x0041
#define TMR2DOS 0x0042
#define TMRCONDOS 0x0043
/* INPUT/OUTPUT PORT UNIT Registers */
#define P1PIN 0xF860
#define P1LTC 0xF862
#define P1DIR 0xF864
#define P2PIN 0xF868
#define P2LTC 0xF86A
#define P2DIR 0xF86C
#define P3PIN 0xF870
#define P3LTC 0xF872
#define P3DIR 0xF874
/* ASYNCHRONOUS SERIAL CHANNEL 0 -- SLOT 15 ADDRESSES */
#define RBR0 0xF4F8
#define THR0 0xF4F8
#define TBR0 0xF4F8
#define DLL0 0xF4F8
#define IER0 0xF4F9
#define DLH0 0xF4F9