2 initialization sequence, 3 design considerations, 1 pin status during and after reset – Intel 386 User Manual

Page 489

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Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL

16-10

16.2.2 Initialization Sequence

After a device reset, a weak pull-up or pull-down resistor holds each pin high or low until user
software writes to the PnCFG register. The pins are configured as inputs in I/O port mode. To en-
sure that the pins are initialized correctly and that the weak resistors are turned off, follow this
suggested initialization sequence.

NOTE

Even if you want to use the entire port as I/O (its default configuration after
reset), you must write to PnCFG to turn off the weak pull-up and pull-down
resistors.

1.

Write to PnLTC to specify the pin value. Writing to PnLTC before PnDIR ensures that
output pins initialize to known values.

For an output pin, write the data that is to be driven by the pin to its PnLTC bit.

For an input pin, set its PnLTC bit.

2.

Write to PnDIR to specify the pin direction.

To configure a pin as a complementary output, clear its PnDIR bit.

To configure a pin as an input or open-drain output, set its PnDIR bit.

3.

Write to PnCFG to turn off the weak resistors and select either I/O or peripheral mode.

To configure a pin for I/O mode, clear its PnCFG bit.

To configure a pin for peripheral mode, set its PnCFG bit.

16.3 DESIGN CONSIDERATIONS

This section outlines design considerations for the I/O ports.

Source and sink current are different between the three ports. Consult the latest Intel386™
EX Embedded Microprocessor
datasheet (order number 272420) for exact specifications.

Use read/modify/write operations to set and clear bits.

16.3.1 Pin Status During and After Reset

A device reset applies an asynchronous reset signal to the port pins. To avoid contention with ex-
ternal drivers, the pins are configured as inputs in I/O port mode. To prevent pins from floating,
a weak pull-up or pull-down resistor holds each pin high or low (Table 16-1). Writing to the
PnCFG register (regardless of the value written) turns off these resistors. For example, writing
any value to P1CFG after a reset turns off the weak pull-down resistors on P1.7–P1.6 and the
weak pull-up resistors on P1.5–P1.0. The resistors remain off until the next reset.

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