Intel 386 - Manual (Page 261)

Intel386™ EX EMBEDDED PROCESSOR USER’S MANUAL
10-18
10.2.6 Mode 5 – Hardware-triggered Strobe
Initializing a counter for mode 5 sets the counter’s OUTn signal, starting the counting sequence.
A gate-trigger loads the programmed count. When the counter reaches zero, OUTn strobes low
for one clock pulse. The counter then rolls over and continues counting, but OUTn does not strobe
low when the count reaches zero. The OUTn strobes low only the first time it reaches zero after
a count is loaded.
Mode 5’s basic operation is outlined below and shown in Figure 10-19.
1. After a control word write, OUTn is driven high.
2. On the CLKINn pulse following a gate-trigger, the count is loaded.
3. On each succeeding CLKINn pulse, the count is decremented.
4. When the count reaches zero, OUTn is driven low.
5. On the following CLKINn pulse, OUTn is driven high.
NOTE
Writing a count of N causes OUTn to strobe low N + 1 CLKINn pulses after
the counter receives a gate-trigger. OUTn remains low for one CLKINn pulse,
then goes high.
Figure 10-19. Mode 5 – Basic Operation
A2316-01
? ? ? ? ? 0003 0002 0001 0000 FFFF 0003
Writes to
Counter n
CLKIN n
GATE n
OUT n
Control
Word = 1AH
Count 0002 0001 0000
Count = 3