Intel 386 - Manual (Page 659)

Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL
E-22
E.2 INSTRUCTION ENCODING
All instruction encodings are subsets of the general instruction format shown in Figure E-1. In-
structions consist of one or two primary opcode bytes, possibly an address specifier consisting of
the “mod r/m” byte and “scaled index” byte, a displacement if required, and an immediate data
field if required.
Within the primary opcode or opcodes, smaller encoding fields may be defined. These fields vary
according to the class of operation. The fields define such information as direction of the opera-
tion, size of the displacements, register encoding, or sign extension.
Almost all instructions referring to an operand in memory have an addressing mode byte follow-
ing the primary opcode byte(s). This byte, the mod r/m byte, specifies the address mode to be
used. Certain encodings of the mod r/m byte indicate a second addressing byte, the scale-index-
base byte, which follows the mod r/m byte to fully specify the addressing mode.
Addressing modes can include a displacement immediately following the mod r/m byte, or scaled
index byte. If a displacement is present, the possible sizes are 8, 16, or 32 bits.
If the instruction specifies an immediate operand, the immediate operand follows any displace-
ment bytes. The immediate operand, if specified, is always the last field of the instruction.
Figure E-1 illustrates several of the fields that can appear in an instruction, such as the mod field
and the r/m field, but the figure does not show all fields. Several smaller fields also appear in cer-
tain instructions, sometimes within the opcode bytes themselves. Table E-2 is a complete list of
all fields appearing in the instruction set. Following Table E-2 are detailed tables for each field.
Figure E-1. General Instruction Format
T T T T T T T T T T T T T T T T mod T T T r/m ss index base d32 16 8 none data32 16 8 none
7 0 7 0 7 6 5 3 2 0 7 6 5 3 2 0
opcode
(one or two bytes)
(T represents an opcode bit)
“mod r/m”
byte
“s-i-b”
byte
address
displacement
(4,2,1 bytes
or none)
immediate
data
(4, 2, 1 bytes
or none)
register and address
mode specifier