Intel 386 - Manual (Page 352)

12-17
DMA CONTROLLER
Figure 12-10. Single Data-transfer Mode with Chaining Buffer-transfer Mode
Is there
a new process
to set up?
No new transfer information, so channel
becomes idle.
Yes
No
A2335-02
Yes
No
Was the
channel set up
for a new
process?
Yes
No
Write new requester and
target addresses and a
new byte count.
DMA is programmed
with the new addresses
and byte count.
DREQ n
active?
Yes
No
After initialization, the DMA channel is
programmed with the requester and
target addresses and a byte count.
DMA gains bus control, transfers one byte
or word of data, decrements byte count, and
then relinquishes bus control.
Byte
count = FFFFFFH
or EOP#
active?