D.3 csnadh (ucsadh) – Intel 386 User Manual

Page 573

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Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL

D-8

D.3

CS

nADH (UCSADH)

Chip-select High Address
CS

nADH (n = 0–6), UCSADH

(read/write)

Expanded Addr:

ISA Addr:
Reset State:

F402H, F40AH
F412H, F41AH
F422H, F42AH
F432H, F43AH

0000H (CS

nADH)

FFFFH (UCSADH)

15

8

CA15

CA14

7

0

CA13

CA12

CA11

CA10

CA9

CA8

CA7

CA6

Bit

Number

Bit

Mnemonic

Function

15–10

Reserved; for compatibility with future devices, write zeros to these bits.

9–0

CA15:6

Chip-select Channel Address Upper Bits:

Defines the upper 10 bits of the channel’s 15-bit address. The address
bits CA15:6 and the mask bits CM15:6 form a masked address that is
compared to memory address bits A25:16 or I/O address bits A15:6.

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