Intel 386 - Manual (Page 488)

16-9
INPUT/OUTPUT PORTS
Figure 16-6. Port Pin State Register (P n PIN)
Port Pin State
P
nPIN (n=1–3)
(read only)
Expanded Addr:
ISA Addr:
Reset State: F860H, F868H, F870H
—
XXH
7 0
PS7 PS6 PS5 PS4 PS3 PS2 PS1 PS0
Bit
Number
Bit
Mnemonic
Function
7–0 PS7:0 Pin State:
Reading a PS bit returns the logic state present on the associated port
pin.