D.18 dmamsk – Intel 386 User Manual
Page 588
Advertising

D-23
SYSTEM REGISTER QUICK REFERENCE
D.18 DMAMSK
DMA Individual Channel Mask
DMAMSK
(write only)
Expanded Addr:
ISA Addr:
Reset State:
F00AH
000AH
04H
7
0
—
—
—
—
—
HRM
0
CS
Bit
Number
Bit
Mnemonic
Function
7–3
—
Reserved; for compatibility with future devices, write zeros to these bits.
2
HRM
Hardware Request Mask:
0 = Unmasks (enables) hardware requests for the channel specified by
bit 0.
1 = Masks (disables) hardware requests for the channel specified by
bit 0.
NOTE: When this bit is set, the channel can still receive software
requests.
1
0
Must be 0 for correct operation.
0
CS
Channel Select:
0 = The selection for bit 2 affects channel 0.
1 = The selection for bit 2 affects channel 1.
Advertising