Texas Instruments TMS320TCI648x - Manual (Page 159)

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5.37 LSUn Control Register 4 (LSUn_REG4)
SRIO Registers
There are four of these registers, one for each LSU (see Table 95 ). LSUn_REG4 is shown in Figure 98
and described in Table 96 . For additional programming see Section 2.3.3 .
Table 95. LSUn_REG4 Registers and the Associated LSUs
Register Address Offset Associated LSU
LSU1_REG4 0410h LSU1
LSU2_REG4 0430h LSU2
LSU3_REG4 0450h LSU3
LSU4_REG4 0470h LSU4
Figure 98. LSUn Control Register 4 (LSUn_REG4)
31 30 29 28 27 26 25 24 23
OUTPORTID PRIORITY XAMSB ID_SIZE DESTID
R/W-00 R/W-00 R/W-00 R/W-00 R/W-0000h
8 7 1 0
INTERRUPT_
DESTID Reserved
REQ
R/W-0000h R-00h R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = Value after reset
Table 96. LSUn Control Register 4 (LSUn_REG4) Field Descriptions
Bit Field Value Description
31–30 OUTPORTID 00b–11b Indicates the number of the output port (0, 1, 2, or 3) from which the packet is to
be transmitted. Specified by the CPU along with the node ID. The output port
value is not included in the RapidIO header.
29–28 PRIORITY 00b–11b Supplies the prio field of the RapidIO packet header to indicate packet priority.
To avoid system deadlock, it is recommended that request packets not be sent
with priority level 3. It is the responsibility of the software to assign the
appropriate outgoing priority.
27–26 XAMSB 00b–11b Supplies the xamsb field of the RapidIO packet header to specify the 2 MSBs of
the extended RapidIO address.
25–24 ID_SIZE Supplies the tt field of the RapidIO packet header to specify whether 8-bit or
16-bit DeviceIDs are used.
00b 8 bit device IDs
01b 16 bit device IDs
1xb Reserved
23–8 DESTID 0000h Supplies the destination ID field of the RapidIO packet header to specifying
target device.
7–1 Reserved 00h These read-only bits return 0s when read.
0 INTERRUPT_REQ Indicates whether the CPU requests an interrupt upon completion of the LSU
command. This is a CPU-controlled request bit and is typically used in
conjunction with non-posted commands to alert the CPU when the requested
data/status is present.
0 Interrupt not requested upon completion of command
1 Interrupt requested upon completion of command
SPRUE13A – September 2006 Serial RapidIO (SRIO) 159
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