Texas Instruments TMS320TCI648x - Manual (Page 223)

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5.84 Port n Attributes Error Capture CSR 0 (SPn_ERR_ATTR_CAPT_DBG0)
SRIO Registers
Each of the four ports is supported by a register of this type (see ). The port n attributes error capture CSR
0 (SPn_ERR_ATTR_CAPT_DBG0) is shown in
Figure 147 and described in Table 163 .
Table 162. SPn_ERR_ATTR_CAPT_DBG0 Registers and the Associated Ports
Register Address Offset Associated Port
SP0_ERR_ATTR_CAPT_DBG0 2048h Port 0
SP1_ERR_ATTR_CAPT_DBG0 2088h Port 1
SP2_ERR_ATTR_CAPT_DBG0 20C8h Port 2
SP3_ERR_ATTR_CAPT_DBG0 2108h Port 3
Figure 147. Port n Attributes Error Capture CSR 0 (SPn_ERR_ATTR_CAPT_DBG0)
31 30 29 28 24 23
INFO_TYPE Reserved ERROR_TYPE IMP_SPECIFIC
R-00 R-0 R-00000 R-00000h
4 3 1 0
IMP_SPECIFIC Reserved CAPTURE_
VALID_INFO
R-00000h R-00 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = Value after reset
Table 163. Port n Attributes Error Capture CSR 0 (SPn_ERR_ATTR_CAPT_DBG0) Field
Descriptions
Bit Field Value Description
31–30 INFO_TYPE Type of information logged
00b Packet
01b Control symbol (only error capture register 0 is valid)
10b Implementation specific (capture register contents are
implementation specific)
11b Reserved
29 Reserved 0 This read-only bit returns 0 when read.
28–24 ERROR_TYPE 00000b–11111b Encoded value of captured error bit in the Port n Error Detect
Register
23–4 IMP_SPECIFIC 00000h–FFFFFh Implementation Dependent Error Information
3–1 Reserved 0 These read-only bits return 0s when read.
0 CAPTURE_VALID_INFO Valid information captured
0 The packet/control symbol capture registers do not contain valid
information.
1 The packet/control symbol capture registers contain valid
information. For control symbols, only capture register 0 contains
meaningful information. A software write of 0 clears this bit and
subsequently unlocks all the capture registers of the port.
SPRUE13A – September 2006 Serial RapidIO (SRIO) 223
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