Registers, Descriptions, Figure 108 – Texas Instruments TMS320TCI648x User Manual
Page 170: Figure 109, Table 114
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SRIO Registers
Figure 108. Transmit CPPI Supported Flow Mask Registers
Transmit CPPI Supported Flow Mask Register 0 (TX_CPPI_FLOW_MASKS0)
31
16
15
0
QUEUE1_FLOW_MASK
QUEUE0_FLOW_MASK
R/W-FFh
R/W-FFh
Transmit CPPI Supported Flow Mask Register 1 (TX_CPPI_FLOW_MASKS1)
31
16
15
0
QUEUE3_FLOW_MASK
QUEUE2_FLOW_MASK
R/W-FFh
R/W-FFh
Transmit CPPI Supported Flow Mask Register 2 (TX_CPPI_FLOW_MASKS2)
31
16
15
0
QUEUE5_FLOW_MASK
QUEUE4_FLOW_MASK
R/W-FFh
R/W-FFh
Transmit CPPI Supported Flow Mask Register 3 (TX_CPPI_FLOW_MASKS3)
31
16
15
0
QUEUE7_FLOW_MASK
QUEUE6_FLOW_MASK
R/W-FFh
R/W-FFh
Transmit CPPI Supported Flow Mask Register 4 (TX_CPPI_FLOW_MASKS4)
31
16
15
0
QUEUE9_FLOW_MASK
QUEUE8_FLOW_MASK
R/W-FFh
R/W-FFh
Transmit CPPI Supported Flow Mask Register 5 (TX_CPPI_FLOW_MASKS5)
31
16
15
0
QUEUE11_FLOW_MASK
QUEUE10_FLOW_MASK
R/W-FFh
R/W-FFh
Transmit CPPI Supported Flow Mask Register 6 (TX_CPPI_FLOW_MASKS6)
31
16
15
0
QUEUE13_FLOW_MASK
QUEUE12_FLOW_MASK
R/W-FFh
R/W-FFh
Transmit CPPI Supported Flow Mask Register 7 (TX_CPPI_FLOW_MASKS7)
31
16
15
0
QUEUE15_FLOW_MASK
QUEUE14_FLOW_MASK
R/W-FFh
R/W-FFh
LEGEND: R/W = Read/Write; -n = Value after reset
Figure 109. TX Queue n FLOW_MASK Fields
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
FL15
FL14
FL13
FL12
FL11
FL10
FL9
FL8
FL7
FL6
FL5
FL4
FL3
FL2
FL1
FL0
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
LEGEND: R/W = Read/Write; -n = Value after reset
Table 114. TX Queue n FLOW_MASK Field Descriptions
Bit
Field
Value
Description
15
FL15
0
Queue n does not support Flow 15 from table entry
1
Queue n supports Flow 15 from table entry
14
FL14
0
Queue n does not support Flow 14 from table entry
1
Queue n supports Flow 14 from table entry
13
FL13
0
Queue n does not support Flow 13 from table entry
1
Queue n supports Flow 13 from table entry
170
Serial RapidIO (SRIO)
SPRUE13A – September 2006