Texas Instruments TMS320TCI648x - Manual (Page 203)

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5.72 Port Error and Status CSR n (SPn_ERR_STAT)
SRIO Registers
Each of the four ports is supported by a register of this type (see Table 146 ). The port error and status
CSR n (SPn_ERR_STAT) is shown in Figure 135 and described in Table 147 .
Table 146. SPn_ERR_STAT Registers and the Associated Ports
Register Address Offset Associated Port
SP0_ERR_STAT 1158h Port 0
SP1_ERR_STAT 1178h Port 1
SP2_ERR_STAT 1198h Port 2
SP3_ERR_STAT 11B8h Port 3
Figure 135. Port Error and Status CSR n (SPn_ERR_STAT)
31 27 26 25 24
OUTPUT_ OUTPUT_ OUTPUT_
Reserved PKT_ FLD_ DEGRD_
DROP ENC ENC
R-0 R/W-0 R/W-0 R/W-0
23 21 20 19 18 17 16
OUTPUT_ OUTPUT_ OUTPUT_ OUTPUT_
OUTPUT_
Reserved RETRY_ RETRY_ ERROR_ ERROR_
RETRIED
ENC STP ENC STP
R-0 R/W-0 R-0 R-0 R/W-0 R-0
15 11 10 9 8
INPUT_ INPUT_ INPUT_
Reserved RETRY_ ERROR_ ERROR_
STP ENC STP
R-0 R-0 R/W-0 R-0
7 5 4 3 2 1 0
PORT_
PORT_ PORT_ PORT_
Reserved WRITE_ Reserved
ERROR OK UNINITIALIZED
PND
R-0 R/W-0 R-0 R/W-0 R-0 R-1
LEGEND: R/W = Read/Write; R = Read only; -n = Value after reset
Table 147. Port Error and Status CSR n (SPn_ERR_STAT) Field Descriptions
Bit Field Value Description
31–27 Reserved 0 These read-only bits return 0s when read.
26 OUTPUT_PKT_DROP Output packet drop (switch devices only)
0 The output port has not discarded a packet.
1 The output port has discarded a packet.
25 OUTPUT_FLD_ENC Output failed condition encountered. Once set, the OUTPUT_FLD_ENC bit
remains set until software writes a 1 to it.
0 The output port has not encountered a failed condition.
1 The output port has encountered a failed condition. The failed port error
threshold has been reached in the Port n Error Rate Threshold Register.
24 OUTPUT_DEGRD_ENC Output degraded condition encountered. Once set, the
OUTPUT_DEGRD_ENC bit remains set until software writes a 1 to it.
0 The output port has not encountered a degraded condition.
1 The output port has encountered a degraded condition. The degraded port
error threshold has been reached in the Port n Error Rate Threshold
Register.
SPRUE13A – September 2006 Serial RapidIO (SRIO) 203
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