Texas Instruments TMS320TCI648x - Manual (Page 17)

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Globally
shared
memory spec
logical
Future
Message
passing system
I/O
Logical specification
Information necessary for the end point
to process the transaction (i.e., transaction
type, size, physical address)
to end in the system (i.e., routing address)
Information to transport packet from end
Transport specification
spec
transport
Common
between two physical devices (i.e., electrical
Information necessary to move packet
interface, flow control)
Physical specification
1x/4x
LP serial LP-LVDS
8/16
Future
spec
physical
checklist
Compliance
Inter-
operability
specification
Overview
Figure 1. RapidIO Architectural Hierarchy
SPRUE13A – September 2006 Serial RapidIO (SRIO) 17
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