Texas Instruments TMS320TCI648x - Manual (Page 83)

www.ti.com
3 Logical/Transport Error Handling and Logging
Logical/Transport Error Handling and Logging
Error management registers allow detection and logging of logical/transport layer errors. The detectable
errors are captured in the logical layer error detect CSR (see
Figure 44 ). Table 34 names the functional
block(s) involved for each detectable error condition, and includes brief descriptions of the errors captured.
Figure 44. Logical/Transport Layer Error Detect CSR (ERR_DET)
31 30 29 28 27 26 25 24
IO_ERR_ MSG_ERR_ ERR_MSG_ ILL_TRANS_ MSG_REQ_ PKT_RSPNS_
Reserved Reserved
RSPNS RSPNS FORMAT DECODE TIMEOUT TIMEOUT
R/W-0 R/W-0 R-0 R/W-0 R/W-0 R-0 R/W-0 R/W-0
23 22 21
UNSOLICITED_ UNSUPPORTED_
Reserved
RSPNS TRANS
R/W-0 R/W-0 R-0
8
Reserved
R-0
7 6 5 0
RX_CPPI_ RX_IO_DMA_
Reserved
SECURITY ACCESS
R/W-0 R/W-0 R-0
LEGEND: R = Read; W = Write; -n = Value after reset
Table 34. Logical/Transport Layer Error Detect CSR (ERR_DET) Field Descriptions
Bit Field Value Description
31 IO_ERR_RSPNS IO error response (endpoint device only)
0 An LSU did not receive an ERROR response to an IO logical layer request.
1 An LSU received an ERROR response to an IO logical layer request. To clear
this bit, write 0 to it.
30 MSG_ERR_RSPNS Message error response (endpoint device only)
0 The TXU did not receive an ERROR response to a message logical layer
request.
1 The TXU received an ERROR response to a message logical layer request. To
clear this bit, write 0 to it.
29 Reserved 0 This read-only bit returns 0 when read.
28 ERR_MSG_FORMAT Error in message format (endpoint device only)
0 The RXU did not receive a message data payload with an invalid size or
segment.
1 The RXU received a message data payload with an invalid size or segment. To
clear this bit, write 0 to it.
27 ILL_TRANS_DECODE Illegal transaction decode (switch or endpoint device)
For an LSU or the TXU:
0 The LSU/TXU did not receive illegal fields in the response packet for an
IO/message transaction.
1 The LSU/TXU received illegal fields in the response packet for an IO/message
transaction. To clear this bit, write 0 to it.
For the MAU or the RXU:
0 The MAU/RXU did not receive illegal fields in the request packet for an
IO/message transaction.
1 The MAU/RXU received illegal fields in the request packet for an IO/message
transaction. To clear this bit, write 0 to it.
26 Reserved 0 This read-only bit returns 0 when read.
SPRUE13A – September 2006 Serial RapidIO (SRIO) 83
Submit Documentation Feedback