ARM Cortex R4F - Manual (Page 329)

Debug
ARM DDI 0363E Copyright © 2009 ARM Limited. All rights reserved. 11-60
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Table 11-45 shows some examples.
Example 11-9 shows the code for setting a simple unaligned watchpoint.
Example 11-9 Setting a simple unaligned watchpoint
bool SetSimpleWatchpoint(int watch_num, uint32 address, int size)
{
// Step 1. Disable the watchpoint being set.
WriteDebugRegister(112 + watch_num, 0x0);
// Step 2. Write addresses to the WVRs, leaving the bottom 3 bits zero.
WriteDebugRegister(96 + watch_num, (address & 0xFFFFFF8));
// Step 3. Determine the byte address select value to use.
byte_address_select := (1 << size) - 1;
byte_address_select := (byte_address_select) << (address & 7);
// Step 4. Write the mask and control register to enable the breakpoint.
WriteDebugRegister (112 + watch_num, 5'b23 | ((byte_address_select & 0xFF) << 5));
// Step 5. Set second watchpoint if required. This is the case if the byte
// address mask is more than 8 bits.
if (byte_address_select >= 256)
{
WriteDebugRegister(112 + watch_num + 1, 0);
WriteDebugRegister(96 + watch_num + 1, (address & 0xFFFFFF8) + 8);
WriteDebugRegister(112 + watch_num + 1 23| ((byte_address_select & 0xFF00) >> 3));
}
// Step 6. Return flag to caller indicating if second watchpoint was used.
return (byte_address_select >= 256)
}
11.11.3 Single-stepping
You can use the breakpoint mismatch bit to implement single-stepping on the processor. Unlike
high-level stepping, single-stepping implements a low-level step that executes a single
instruction at a time. With high-level stepping, the instruction is decoded to determine the
address of the next instruction and a breakpoint is set at that address.
Table 11-45 Example byte address masks for watchpointed objects
Address of object
Object size
in bytes First address
value First byte
address mask Second address
value Second byte
address mask
0x00008000 1 0x00008000 0b00000001 Not required -
0x00008007 1 0x00008000 0b10000000 Not required -
0x00009000
2
0x00009000 0b00000011
Not required -
0x0000900c 2 0x00009000 0b11000000 Not required -
0x0000900d 2 0x00009000 0b10000000 0x00009008 0b00000001
0x0000A000 4 0x0000A000 0b00001111 Not required -
0x0000A003 4 0x0000A000 0b01111000 Not required -
0x0000A005
4
0x0000A000 0b11100000 0x0000A008 0b00000001
0x0000B000 8 0x0000B000 0b11111111 Not required -
0x0000B001 8 0x0000B000 0b11111110 0x0000B008 0b00000001