ARM Cortex R4F - Manual (Page 358)

Integration Test Registers
ARM DDI 0363E Copyright © 2009 ARM Limited. All rights reserved. 13-4
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13.3 Summary of the processor registers used for integration testing
Table 13-1 lists the processor Integration Test Registers and the Integration Mode Control
Register (ITCTRL).
Table 13-1 Integration Test Registers summary
Register
name Base
offset Default
value
Type
Clock
domain
Description
Integration Test Registers
ITETMIF 0xED8 - a WO CLK See ITETMIF Register (ETM interface) on page 13-7
ITMISCOUT
0xEF8
n/a WO CLK See ITMISCOUT Register (Miscellaneous Outputs)
on page 13-8
ITMISCIN
0xEFC - a RO CLK See ITMISCIN Register (Miscellaneous Inputs) on
page 13-8
Integration Mode Control Register
ITCTRL 0xF00 0 R/W CLK See Integration Mode Control Register (ITCTRL) on
page 13-9
a. See the register description for this value.