Maxim Integrated High-Speed Microcontroller Users Guide: Network Microcontroller Supplement - Manual (Page 153)

High-Speed Microcontroller User’s
Guide: Network Microcontroller
Supplement
153
Figure 19-10. CAN Interrupt Logic
Arbitration/Masking Considerations
The CAN processor is designed to evaluate and determine if an incoming message is loaded into one of the 15 message centers.
Acceptance of a message is determined by comparing the message’s ID and/or data field against the corresponding arbitration infor-
mation defined for each message center. Messages that contain bit errors or fail arbitration are discarded. The incoming message is
tested in order against each enabled message center (enabled by the MSRDY bit in the CAN message control register) from 1 to 15.
The first message center to successfully pass the test receives the incoming message and ends the testing, and the message is loaded
into the respective message center.
The DS80C400 CAN module supports two types of arbitration: basic and media. Basic arbitration compares either the 29-bit (EX/ST =
1) or 11-bit (EX/ST = 0) incoming message ID against the corresponding bits in the message center CAN arbitration registers
(C0MxAR0–3). This depends upon whether the message center has been configured for 29-bit or 11-bit operation. An optional mask-
ing feature can also be utilized in conjunction with basic arbitration. The format register (C0MxF) for each message center contains a
message identification mask enable bit (MEME). If MEME is set, the CAN module factors in the standard global mask registers
C
Q D
R
CAN 0 STATUS
REGISTER READ
CAN
0/1
STATUS
REGISTER
CAN 0
CONTROL
REGISTER
BSS
ERIE STIE
EA INTERRUPT
PRIORITY
LOGIC INTERRUPT
VECTOR
63 HEX
C0IE
UPDATECAN 0
INTERRUPT
REGISTER
ETI ERI
CAN 0 MESSAGE 1
CONTROL REGISTER
SUCCESSFULTRANSMIT
MESSAGE CENTER 1
SUCCESSFULRECEIVE
MESSAGE CENTER 1
MESSAGE CENTER 1
MESSAGE CENTER 15
INTRQ
1
EC96
WKS
RXS
TXS
ER2
ER1
ER0
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