Slave address register 2 (saddr2), Breakpoint address register 1 (bpa1), Breakpoint address register 2 (bpa2) – Maxim Integrated High-Speed Microcontroller Users Guide: Network Microcontroller Supplement User Manual
Page 83: Breakpoint address register 3 (bpa3)
High-Speed Microcontroller User’s
Guide: Network Microcontroller
Supplement
83
7
6
5
4
3
2
1
0
SFR DAh
BPA1.7
BPA1.6
BPA1.5
BPA1.4
BPA1.3
BPA1.2
BPA1.1
BPA1.0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
7
6
5
4
3
2
1
0
SFR DBh
BPA2.7
BPA2.6
BPA2.5
BPA2.4
BPA2.3
BPA2.2
BPA2.1
BPA2.0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
7
6
5
4
3
2
1
0
SFR DCh
BPA3.7
BPA3.6
BPA3.5
BPA3.4
BPA3.3
BPA3.2
BPA3.1
BPA3.0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
Slave Address Register 2 (SADDR2)
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
7
6
5
4
3
2
1
0
SFR D9h
SADDR2.7
SADDR2.6
SADDR2.5
SADDR2.4
SADDR2.3
SADDR2.2
SADDR2.1
SADDR2.0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
Breakpoint Address Register 1 (BPA1)
R = Unrestricted read, W = Unrestricted write, -n = Value after reset, unrestricted read/write in the emulation mode.
Breakpoint Address Register 2 (BPA2)
R = Unrestricted read, W = Unrestricted write, -n = Value after reset, unrestricted read/write in the emulation mode.
Breakpoint Address Register 3 (BPA3)
R = Unrestricted read, W = Unrestricted write, -n = Value after reset, unrestricted read/write in the emulation mode.
SADDR2.7–0
Bits 7–0
Slave address register 2. This register is programmed with the given or broadcast address assigned
to serial port 2.
BPA1.7–0
Bits 7–0
Breakpoint LSB address register. This register is intended to be used only by the internal breakpoint
hardware to store the least significant address byte of the return address when an A5h software break-
point is issued. Modification of this register is allowed during the breakpoint routine.
BPA2.7–0
Bits 7–0
Breakpoint MSB address register. This register is intended to be used only by the internal breakpoint
hardware to store the most significant address byte of the return address when an A5h software break-
point is issued. Modification of this register is allowed during the breakpoint routine.
BPA3.7–0
Bits 7–0
Breakpoint XSB address register. This register is intended to be used only by the internal breakpoint
hardware to store the extended address byte of the return address when an A5h software breakpoint is
issued. Modification of this register is allowed during the breakpoint routine.
Maxim Integrated