Maxim Integrated High-Speed Microcontroller Users Guide: Network Microcontroller Supplement - Manual (Page 110)

High-Speed Microcontroller User’s
Guide: Network Microcontroller
Supplement
110
Early Warning Power-Fail Interrupt
The PFI status bit is set if either V CC1 < V PFW1 or V CC3 < V PFW3 . Two additional status bits, V1PF (STATUS1.3) and V3PF (STATUS1.2),
have been implemented so that the application can assess whether the V
CC1
or V
CC3
supply caused the PFI bit to be set. Manually
setting either V1PF or V3PF status bit causes the PFI bit to be set. Clearing the PFI bit automatically clears both status bits.
Power-Fail Reset
The DS80C400 automatically invokes a reset if either V
CC1
< V
RST1
or V
CC3
< V
RST3
. The only exception is if the device is in stop mode
and BGS = 0. For this exception, the bandgap voltage reference is disabled, leaving the microcontroller unable to detect if either sup-
ply falls below its power-fail reset threshold.
Power-On Reset
The DS80C400 power-on reset sequence does not begin until both supplies are above their respective reset thresholds (i.e., V
CC1
>
V
RST1
and V
CC3
> V
RST3
). Once this condition is met, the 65536 oscillator clock warmup period begins. If either supply falls below its
reset threshold during this warmup period, the process restarts.
Bandgap Select
Refer to the DC Electrical Characteristics section of the DS80C400 data sheet for stop mode current specifications when the bandgap
circuitry is enabled (BGS = 1) and disabled (BGS = 0).
Power-Management Summary
In addition to the bits listed in the High-Speed Microcontroller User’s Guide, the following bits have been added:
STATUS1.3 V1PF—V
CC1
power-fail. This bit is set to indicate that V
CC1
has fallen below V
PFW1
. The bit is cleared automati-
cally when the PFI (WDCON.4) bit is cleared. Writing a 1 to this bit causes the PFI bit to be set.
STATUS1.2 V3PF—V
CC3
power-fail. This bit is set to indicate that V
CC3
has fallen below V
PFW3
. The bit is cleared automati-
cally when the PFI (WDCON.4) bit is cleared. Writing a 1 to this bit causes the PFI bit to be set.
Power-Management Modes
A single power-management mode, referenced as PMM2 in the High-Speed Microcontroller User’s Guide, is supported by the
DS80C400. This PMM provides a machine cycle equal to the oscillator frequency divided by 1024. Power-management mode 1
(PMM1) is not supported on the DS80C400. A STATUS1 (F7h) register has been added, which contains transmit and receive activity
indicators for serial port 2. These status indicators can be interrogated to prevent entry into PMM at an inopportune time.
STATUS1.1 SPTA2—Serial port 2 transmit activity. This bit indicates that data is currently being transmitted by serial port 2.
STATUS1.0 SPRA2—Serial port 2 receive activity. This bit indicates that data is currently being received by serial port 2.
PMM And Peripheral Functions
Invoking PMM alters the system clock and those peripheral functions that derive their timing from the system clock. In addition to the
peripherals mentioned in the High-Speed Microcontroller User’s Guide, the following DS80C400 peripherals are affected by use of PMM:
• Timer 3
• Serial port 2
• CAN controller
• Ethernet controller
• 1-Wire bus master
The user is advised against using these peripheral functions while in PMM. The switchback feature, detailed in the High-Speed
Microcontroller User’s Guide, provides a means of quickly exiting PMM so that these peripherals can be operated at the default, divide-
by-4 system clock.
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