Port 6 (p6) – Maxim Integrated High-Speed Microcontroller Users Guide: Network Microcontroller Supplement User Manual
Page 61
High-Speed Microcontroller User’s
Guide: Network Microcontroller
Supplement
61
Port 6 (P6)
7
6
5
4
3
2
1
0
SFR B1h
P6.7
TXD2
P6.6
RXD2
P6.5
A21
P6.4
A20
P6.3
CE7
P6.2
CE6
P6.1
CE5
P6.0
CE4
R-1
R-1
R-1
R-1
R-1
R-1
R-1
R-1
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
P6.7–0
Bits 7–0
TXD2
Bit 7
RXD2
Bit 6
A21
Bit 5
A20
Bit 4
CE7
Bit 3
CE6
Bit 2
CE5
Bit 1
CE4
Bit 0
Parallel I/O port 6. Any port 6 pin assigned to function as an external memory interface through the port
6 control register cannot be altered by a write to the port 6 SFR. All bits assigned a standard I/O are pro-
grammed as per the data value. In addition, all pins have an alternate function listed as follows. A read
of a bit assigned to function as an external memory interface reads back a 1 when read by the port 6
SFR. A read of a bit assigned to standard I/O produces the value of the respective port 6 pin when that
port pin was previously programmed with a 1 pseudo-input state or previously programmed as a 0 out-
put state. Note that the use of read-modify-write instructions on ports 1, 2, 3, 4, 5, 6, and 7 on the
DS80C400 read the state of the port latch, as opposed to the port pin data. These instructions are out-
lined in the High-Speed Microcontroller User’s Guide.
Serial port 2 transmit. This pin transmits the serial port 2 data in serial port modes 1, 2, and 3 and emits
the synchronizing clock in serial port mode 0.
Serial port 2 receive. This pin receives the serial port 2 data in serial port modes 1, 2, and 3 and is a
bidirectional data transfer pin in serial port mode 0.
Program/data memory address 21. When this bit is set to logic 1 and the P4CNT register is configured
correctly, the corresponding device pin represents the A21 memory signal.
Program/data memory address 20. When this bit is set to logic 1 and the P4CNT register is configured
correctly, the corresponding device pin represents the A20 memory signal.
Program memory chip enable 7. When this bit is set to logic 1 and the P6CNT register is configured
correctly, the corresponding device pin represents the CE7 memory signal.
Program memory chip enable 6. When this bit is set to logic 1 and the P6CNT register is configured
correctly, the corresponding device pin represents the CE6 memory signal.
Program memory chip enable 5. When this bit is set to logic 1 and the P6CNT register is configured
correctly, the corresponding device pin represents the CE5 memory signal.
Program memory chip enable 4. When this bit is set to logic 1 and the P6CNT register is configured
correctly, the corresponding device pin represents the CE4 memory signal.
Maxim Integrated