Ds80c410/ds80c411 – Maxim Integrated High-Speed Microcontroller Users Guide: Network Microcontroller Supplement User Manual

Page 99

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DS80C410/DS80C411

Similar to the DS80C400, the DS80C410 and DS80C411 incorporate three internal SRAM memory blocks: a 1kB block usable as data

memory and extended stack memory, a 64kB block usable as data memory and Ethernet transmit/receive buffer memory, and a 256-

byte block usable as data memory and CAN controller memory. For the 1kB internal SRAM to be used as extended stack memory, the

stack address mode (SA) bit contained in the ACON register must be set to 1. Unlike the DS80C400, the logical addresses of these

blocks are fixed, as follows:

CAN SRAM (256 byte):

FFDB00h–FFDBFFh

Data/Extended Stack (1kB)

FFDC00h–FFDFFFh

Internal Data memory (64kB)

0000000h–00FFFFh

The 64kB memory block can be enabled or disabled by the Internal RAM Disable bit, IRAMD (MCON1.7). When enabled, the 64kB

memory block appears in the MOVX address space at locations 0000000h–00FFFFh. All MOVX memory operations in that range auto-

matically access internal memory, and no external memory signals (address bus, RD or WR strobes) are active. When disabled, all

MOVX memory operations over that range are directed onto the external bus and the internal locations are ignored.

The DS80C410/411 incorporate a new feature that allows the 64kB memory block to be mapped from data into program memory

space. The Program RAM Enable bit, PRAME (MCON1.6) controls whether the 64kB memory block, if enabled by the IRAMD bit, will

either be located at 0000000h–00FFFFh in data space or program space. This very useful feature allows the designer to create self-

modifying code by using MOVC instructions to read existing code space into the 64kB data memory block, modify it, and then use the

PRAME bit to map the 64kB block back into program memory space. These features are illustrated in Figure 6-3.

High-Speed Microcontroller User’s

Guide: Network Microcontroller

Supplement

99

Figure 6-3. Example Data Memory Map Configurations (DS80C410/DS80C411)

Addressable

External

Data Memory

IRAMD = 1, PRAME = X

Internal 8kB SRAM

(Ethernet BCU)

FFFFFFh

Internal 1kB SRAM

(Optional Stack)

FFE000h

FFDFFFh

FFDC00h

FFDBFFh

FFDB00h

FFDAFFh

000000h

256 Byte SRAM

(CAN)

Addressable

External

Data Memory

Internal 65kB

Data SRAM

IRAMD = 0, PRAME = 0

* This memory should not be

accessed on the DS80C411.

* This memory should not be

accessed on the DS80C411.

Internal 8kB SRAM

(Ethernet BCU)

FFFFFFh

Internal 1kB SRAM

(Optional Stack)

FFE000h

FFDFFFh

FFDC00h

FFDBFFh

FFDB00h

FFDAFFh

010000h

00FFFFh

000000h

010000h

00FFFFh

256 Byte SRAM*

(CAN)

Addressable

External

Data Memory

Internal merged

64kB Data

and Program SRAM

Internal 8kB SRAM

(Ethernet BCU)

Internal 1kB SRAM

(Optional Stack)

256 Byte SRAM*

(CAN)

IRAMD = 0, PRAME = 1

FFFFFFh

FFE000h

FFDFFFh

FFDC00h

FFDBFFh

FFDB00h

FFDAFFh

000000h

Maxim Integrated

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