Maxim Integrated High-Speed Microcontroller Users Guide: Network Microcontroller Supplement - Manual (Page 179)

High-Speed Microcontroller User’s
Guide: Network Microcontroller
Supplement
179
Figure 22-7. Half-Duplex Transmit Deferral/Collision Handling
FLOW CONTROL
In half-duplex mode, the MAC supports receive side flow control through back pressure. The DS80C400 asserts back pressure when
the receive buffer has reached the threshold level of five or fewer available pages. Back pressure is asserted by transmitting a jam-
ming signal of four to 6 random bytes onto the bus. The jamming signal is intended to cause collisions for other nodes on the bus to
allow the DS80C400 to free additional receive buffer pages. Back pressure occurs only if the flow control enable (FCE) bit of the flow
control (1Ch) register is set to 1. Back pressure is not asserted if triggered during reception of a frame, but occurs for any subsequent
receive frames, assuming that the receive buffer is still below the threshold limit.
FULL-DUPLEX OPERATION
The DS80C400 supports full-duplex Ethernet operation, allowing simultaneous transmit and receive operation over the media inde-
pendent interface. When using full-duplex Ethernet, the physical media is not shared and therefore does not require CSMA/CD. For
this reason, the COL pin is ignored by the MAC and the interpacket gap (IPG) timer for the transmit side is based solely upon the TX_EN
signal instead of the CRS input. For receive side flow control, the PAUSE control frame is used.
PAUSE CONTROL FRAME
The pause control frame is used to inhibit transmission of data frames for a specified time (within the pause frame). A pause control
frame consists of the globally assigned multicast address 01-80-C2-00-00-01, the pause op code, and a parameter specifying the
quanta of slot time (512 bit times/slot) to inhibit data transmission. The pause parameter can range from 0 to 65,536 slot times. When
the MAC receives a frame with the reserved multicast address and pause op code, the MAC inhibits data frame transmission for the
length of time as indicated by the pause parameter. If a pause request is received while a transmission is in progress, then the pause
takes effect after the current transmission is completed. Pause control frames are automatically received and processed by the MAC
and can be passed on to the application (PF bit of the receive status word is set) when the pass-pause control frame bit in the flow
control register is set.
CARRIER IDLE?
(CRS = 0?)
DEFERRED.
(> 24,288 BIT
TIMES & DC =
1?)
TRANSMIT
COLLISION?
(COL pin = 1?)
WRITE
TRANSMIT
STATUS WORD
No
No
TRANSMIT
Yes — Abort
Yes — Transmit
No — Success
RETRY
DISABLED?
(DRTY = 1?)
Yes—
Send jam
signal Yes—Abort
LATE
COLLISION
AND LCC = 0?
No
Yes—Abort
COLLISION
COUNT = 16?
Yes—Abort
No
No—Back off
*Note: Flow diagram does not
show no carrier, carrier loss, or
jabber timeout possibilities.
Maxim Integrated