Altera DDR SDRAM High-Performance Controllers and ALTMEMPHY IP - Manual (Page 109)

Chapter 6: Functional Description—High-Performance Controller II 6–15
Top-Level Signals Description
June 2011 Altera Corporation External Memory Interface Handbook Volume 3
Section I. DDR and DDR2 SDRAM Controllers with ALTMEMPHY IP User Guide
local_autopch_req Input
User control of autoprecharge. If you turn on Enable Auto-Precharge
Control, the local_autopch_req signal becomes available and you can
request the controller to issue an autoprecharge write or autoprecharge read
command.
These commands cause the memory to issue a precharge command to the
current bank at the appropriate time without an explicit precharge command
from the controller. This feature is particularly useful if you know the current
read or write is the last one you intend to issue to the currently open row. The
next time you need to use that bank, the access could be quicker as the
controller does not need to precharge the bank before activating the row you
wish to access.
Upon receipt of the local_autopch_req signal, the controller evaluates the
pending commands in the command buffer and determines the most efficient
autoprecharge operation to perform, reordering commands if necessary.
local_self_rfsh_chip Input
Controls which chip to issue the user refresh to. The IP core uses this active
high signal with local_self_rfsh_req. This signal is as wide as the
memory chip select. This signal asserts a high value to each bit that
represents the refresh for the corresponding memory chip.
For example: If local_self_rfsh_chip signal is assigned with a value of
4’b0101
, the controller refreshes the memory chips 0 and 2, and memory
chips 1 and 3 are not refreshed.
local_self_rfsh_req Input
User control of the self-refresh feature. If you turn on Enable Self-Refresh
Controls, you can request that the controller place the memory devices into a
self-refresh state by asserting this signal. The controller places the memory
in the self-refresh state as soon as it can without violating the relevant timing
parameters and responds by asserting local_self_rfsh_ack. You can
hold the memory in the self-refresh state by keeping this signal asserted. You
can release the memory from the self-refresh state at any time by deasserting
local_self_rfsh_req
and the controller responds by deasserting
local__self_rfsh_ack when it has successfully brought the memory out
of the self-refresh state.
local_init_done Output
When the memory initialization, training, and calibration are complete, the
PHY sequencer asserts ctrl_usr_mode_rdy to the memory controller,
which then asserts this signal to indicate that the memory interface is ready
for use.
The controller still accepts read and write requests before
local_init_done
is asserted, however it does not issue them to the
memory until it is safe to do so.
This signal does not indicate that the calibration is successful.
local_rdata[] Output
Read data bus. The width of local_rdata is twice that of the memory data
bus for a full rate controller; four times the memory data bus for a half rate
controller.
local_rdata_error Output
Asserted if the current read data has an error. This signal is only available if
you turn on Enable Error Detection and Correction Logic. The controller
asserts this signal with the local_rdata_valid signal.
If the controller encounters double-bit errors, no correction is made and the
controller asserts this signal.
local_rdata_valid Output
Read data valid signal. The local_rdata_valid signal indicates that valid
data is present on the read data bus.
Table 6–7. Local Interface Signals (Part 3 of 4)
Signal Name Direction Description