Rockwell Automation 1771-PD PID MODULE (+DU) User Manual

Page 116

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Programming

Chapter 3

3Ć73

TW’ = 100 + RI0 + .5W + 9 (equation 2 for when
TW<100msec)

The equations for TW or TW’ can be used to calculate the time for a
single write or read operation when no other block transfer modules are in
the system.

The worst case block transfer time TW or TW’ starts when the block
transfer instruction is enabled in the ladder diagram program and ends
when the module has received the transfer and the PC processor has
received the done bit and is ready for the next transfer. It includes system
time and module time. However, when block transfer instructions are
enabled for other block transfer modules in the system, it is possible that
all other modules could be given priority to perform one block transfer
ahead of the subject module. This queuing effect must be considered
when calculating the worst case time T Q, for a single read or write
operation as follows:

T

Q

= TW + T

BT1

+ T

BT2

+ T

BT3

+ ...

(equation 3)

NOTE: The time for one block transfer operation, such as T BT1, of
another block transfer module can be calculated using the following
equation.

T

BT

= PS + PI0 + 2 RI0 + .5W + 9

(equation 4)

3.

Calculate the time required for a load/enter sequence.

When calculating the worst case time for an entire load/enter block
transfer sequence, multiply the individual block transfer times TW by the
number of block transfer in the sequence. This will give an estimated
times for a single PID module in a remote system where no other block
transfer modules are present; or when the block transfer instructions of all
other block transfer modules are not enabled during the load/enter
sequence.

When there are other block transfer modules in the system performing a
write or read operation during the load/enter sequence, the transfer times
of these modules must be considered. For worst case, assume that all
other block transfer modules are queued and have priority to perform one
block transfer ahead of the PID module during each transfer of the
load/enter sequence. The total time for the load/enter sequence will be

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