Altera RapidIO MegaCore Function - Manual (Page 107)

Chapter 4: Functional Description 4–61
Error Detection and Management
August 2014 Altera Corporation RapidIO MegaCore Function
User Guide
Error Detection and Management
The error detection and management mechanisms in the RapidIO specification and
those built into the RapidIO IP core provide a high degree of reliability. In addition to
error detection, management, and recovery features, the RapidIO IP core also
provides debugging and diagnostic aids.
This section describes the error detection and management features in the RapidIO IP
core.
Physical Layer Error Management
Errors at the Physical layer are mainly of the following two types:
■ Protocol violations
■ Transmission errors
Protocol violations can be caused by a link partner that is not fully compliant to the
specification, or can be a side effect of the link partner being reset.
Transmission errors can be caused by noise on the line and consist of one or more bit
errors. The following mechanisms exist for checking and detecting errors:
■ The receiver checks the validity of the received 8B10B encoded characters,
including the running disparity.
■ The receiver detects control characters changed into data characters or data
characters changed into control characters, based on the context in which the
character is received.
■ The receiver checks the CRC of the received control symbols and packets.
4
Payload
Byte16,17
[63:48] 16'h1112
Payload double word 2
Payload
Byte18,19
[47:32] 16'h1314
Payload
Byte20,21
[31:16] 16'h1516
Payload
Byte22,23
[15:0] 16'h1718
5
Payload
Byte24,25
[63:48] 16'h191a
Payload double word 3
Payload
Byte26,27
[47:32] 16'h1b1c
Payload
Byte28,29
[31:16] 16'h1d1e
Payload
Byte30,31
[15:0] 16'h1f20
Table 4–16. RapidIO Header Fields on the gen_tx_data Bus (Part 2 of 2)
Cycle Field gen_tx_data bus Value Comment