Altera RapidIO MegaCore Function - Manual (Page 145)

Chapter 6: Software Interface 6–13
Transport and Logical Layer Registers
August 2014 Altera Corporation RapidIO MegaCore Function
User Guide
CRF_SUPPORT [5] RO
Processing element supports the Critical Request Flow (CRF)
indicator:
1'b0—Critical Request Flow is not supported
1'b1—Critical Request Flow is supported
1'b0
LARGE_TRANSPORT [4] RO
Processing element supports common transport large systems:
1'b0—Processing element does not support common
transport large systems (device ID width is 8 bits).
1'b1—Processing element supports common transport
large systems (device ID width is 16 bits).
The value of this field is determined by the device ID width you
select in the RapidIO parameter editor.
(1)
EXT_FEATURES [3] RO
Processing element has extended features list; the extended
features pointer is valid.
1'b1
EXT_ADDR_SPRT [2:0] RO
Indicates the number of address bits supported by the
processing element, both as a source and target of an
operation. All processing elements support a minimum 34-bit
addresses:
3'b111—Processing element supports 66, 50, and 34-bit
addresses
3'b101—Processing element supports 66 and 34-bit
addresses
3'b011—Processing element supports 50 and 34-bit
addresses
3'b001—Processing element supports 34-bit addresses
3'b001
Note to Table 6–16 :
(1) The default value is set in the RapidIO parameter editor.
Table 6–16. Processing Element Features CAR—Offset: 0x10 (Part 2 of 2)
Field Bits Access Function Default
Table 6–17. Switch Port Information CAR—Offset: 0x14
Field Bits Access Function Default
RSRV [31:16] RO Reserved 16'h0
PORT_TOTAL [15:8] RO
The total number of RapidIO ports on the processing element:
8'h0—Reserved
8'h1—1 port
8'h2—2 ports
...
8'hFF—255 ports
(1)
PORT_NUMBER [7:0] RO
This is the port number from which the MAINTENANCE read
operation accessed this register. Ports are numbered starting with
'h0.
(1)
Note to Table 6–17 :
(1) The default value is set in the RapidIO parameter editor.