Altera RapidIO MegaCore Function - Manual (Page 42)

3–6 Chapter 3: Parameter Settings
I/O and Doorbell Settings
RapidIO MegaCore Function August 2014 Altera Corporation
User Guide
Port Write Tx Enable
Port write Tx enable turns on or turns off the transmission of port-write requests by
the Maintenance Logical layer module.
Port Write Rx Enable
Port write Rx enable turns on or turns off the reception of port-write requests by the
Maintenance Logical layer module.
I/O and Doorbell Settings
This page lets you enable and configure the Input/Output and Doorbell Logical layer
modules
I/O Logical Layer Interfaces
I/O logical layer Interfaces selects whether or not to add an Avalon-MM master
interface and whether or not to add an Avalon-MM slave interface. You can specify
one of the following options:
■ Avalon-MM Master and Slave
■ Avalon-MM Master (this option is not valid in Arria 10 variations)
■ Avalon-MM Slave (this option is not valid in Arria 10 variations)
■ None
For RapidIO IP core variations that target an Arria 10 device, only two of the values
are valid. Arria 10 variations either include both an I/O Logical layer master module
and an I/O Logical layer slave module (Avalon-MM Master and Slave) or do not
include a I/O Logical layer module (None).
I/O Slave Address Width
I/O slave address width specifies the Input/Output slave address width. The default
width is 30 bits.
However, because the I/O Logical layer slave module addresses all hold word
address values in 1x variations or double-word address values in 2x and 4x variations,
the width of the external I/O Logical layer slave module address busses is the value
you specify, minus 2 in 1x variations, or the value you specify, minus 3 in 2x and 4x
variations.
I/O Read and Write Order Preservation
I/O read and write order preservation controls support for order preservation
between read and write operations (NWRITE, NWRITE_R, SWRITE, and NREAD requests) in
the I/O Avalon-MM Logical layer slave module. By default this feature is turned off.
This parameter is available only if you set I/O logical layer Interfaces to Avalon-MM
Master and Slave
or Avalon-MM Slave.