Altera RapidIO MegaCore Function - Manual (Page 163)

August 2014 Altera Corporation RapidIO MegaCore Function
User Guide
7. Testbenches
The RapidIO IP core includes a demonstration testbench for your use. The purpose of
the testbench is to provide examples of how to parameterize the IP core and how to
use the Avalon Memory-Mapped (Avalon-MM) and Avalon Streaming (Avalon-ST)
interfaces, to generate and process RapidIO transactions.
The demonstration testbench demonstrates the following functions:
■ Port initialization process
■ Transmission, reception, and acknowledgment of packets with 8 to 256 bytes of
data payload
■ Support for 8-bit or 16-bit device ID fields
■ Reading from the software interface registers
■ Transmission and reception of multicast-event control symbols
The testbench generates and monitors transactions on the Avalon-MM interfaces and
Avalon-ST interface.
The testbench generates MAINTENANCE, Input/Output, or DOORBELL transactions if you
select the corresponding modules during parameterization of the IP core. If your IP
core variation includes an Avalon-ST pass-through interface, the testbench transfers
Type 9 (Data Streaming) packets through that interface.
The testbench instantiates two symmetrical RapidIO IP core variations. One instance
is the Device Under Test (DUT). The other instance acts as a RapidIO link partner for
the RapidIO DUT module and is referred to as the sister_rio module. The sister_rio
module responds to transactions initiated by the DUT and generates transactions to
which the DUT responds. Bus functional models (BFM) are connected to the Avalon-
MM and Avalon-ST interfaces of both the DUT and sister_rio modules, to generate
transactions to which the link partner responds when appropriate, and to monitor the
responses.
Figure 7–1 is a block diagram of the testbench in which all of the available
Avalon-MM interfaces are enabled. The two MegaCore modules communicate with
each other using the RapidIO interface. The testbench initiates the following
transactions at the DUT and targets them to the sister_rio module:
■ SWRITE
■ NWRITE_R
■ NWRITE
■ NREAD
■ DOORBELL messages
■ MAINTENANCE writes and reads
■ MAINTENANCE port writes and reads
■ Type 9 (Data Streaming) transactions (using the Avalon-ST interface)