LSI 53C875A - Manual (Page 100)

4-8 Registers
Register: 0x0D
Latency Timer
Read/Write
LT Latency Timer [7:0]
The Latency Timer register specifies, in units of PCI bus
clocks, the value of the Latency Timer for this PCI bus
master. The LSI53C875A supports this timer. All eight
bits are writable, allowing latency values of 0–255 PCI
clocks. Use the following equation to calculate an
optimum latency value for the LSI53C875A.
Latency = 2 + (Burst Size x (typical wait states + 1))
Values greater than optimum are also acceptable.
Register: 0x0E
Header Type
Read Only
HT Header Type [7:0]
This register identifies the layout of bytes 0x10 through
0x3F in configuration space and also whether or not the
device contains multiple functions. Since the LSI53C875A
is not a multifunction controller the value of this register
is 0x00.
Register: 0x0F
Not Supported
7 0
LT
0 0 0 0 0 0 0 0
7 0
HT
0 0 0 0 0 0 0 0