LSI 53C875A - Manual (Page 34)

2-12 Functional Description
•
Multiple Memory Write and Invalidates.
•
A single data residual Memory Write to complete the transfer.
Table 2.2 describes PCI cache mode alignment.
Table 2.2 PCI Cache Mode Alignment
Host Memory
A 00h
B 04h
08h
C 0Ch
D 10h
14h
18h
1Ch
E 20h
24h
28h
2Ch
F 30h
34h
38h
3Ch
G 40h
44h
48h
4Ch
H 50h
54h
58h
5Ch
60h