Back-to-back write, 32-bit address and data – LSI 53C875A User Manual
Page 264
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6-26
Electrical Specifications
Figure 6.18 Back-to-Back Write, 32-Bit Address and Data
CLK
(Driven by System)
FRAME/
(Driven by LSI53C875A)
AD
(Driven by LSI53C875A-
C_BE/
(Driven by LSI53C875A)
PAR
(Driven by LSI53C875A-
IRDY/
(Driven by LSI53C875A)
TRDY/
(Driven by Target)
STOP/
(Driven by Target)
DEVSEL/
(Driven by Target)
Addr; Target-Data)
Addr; Target-Data)
GNT/
(Driven by Arbiter)
REQ/
(Driven by LSI53C875A)
GPIO1_MASTER/
(Driven by LSI53C875A)
GPIO0_FETCH/
(Driven by LSI53C875A)
t
3
t
2
t
4
t
1
t
5
t
6
t
9
t
10
Addr
Out
Data
Out
CMD
BE
Addr
Out
Data
Out
CMD
BE
t
3
t
3
t
3
t
3
t
3
t
3
t
1
t
2
t
3
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