Index ix-7 – LSI 53C875A User Manual

Page 317

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Index

IX-7

memory (Cont.)

read line command

2-6

read multiple

2-10

,

2-11

read multiple command

2-6

space

2-2

,

2-3

to memory

2-16

to memory moves

2-16

write

2-10

,

2-11

write and invalidate

2-10

write and invalidate command

2-8

write caching

2-11

write command

2-5

write enable

3-11

Min_Gnt (MG)

4-14

MOE/

3-11

move to/from SFBR cycles

5-24

multiple cache line transfers

2-8

MWE/

3-11

N

new capabilities (NC)

4-6

new features in the LSI53C875A

1-3

Next_Item_Ptr (NIP)

4-15

no connections

3-13

no download mode

2-51

no flush

5-33

store instruction only

5-36

not supported

4-8

,

4-10

O

opcode

5-9

,

5-14

,

5-22

,

5-26

fetch burst capability

2-22

operating conditions

6-2

operator

5-22

P

PAR

3-5

parallel ROM interface

2-48

parallel ROM support

2-49

parity

2-26

,

3-5

error

3-7

(PAR)

4-78

options

2-24

PCI

addressing

2-2

and external memory interface timing diagrams

6-11

bus commands and encoding types

2-4

bus commands and functions supported

2-3

cache line size register

2-8

cache mode

2-9

commands

2-3

configuration into enable (PCICIE)

4-54

configuration register read

6-13

configuration registers

4-1

configuration space

2-2

functional description

2-2

I/O space

2-3

interface signals

3-4

master transaction

2-10

master transfer

2-10

memory space

2-3

performance

1-6

target disconnect

2-9

target retry

2-9

PERR/

3-7

phase mismatch

handling in SCRIPTS

2-17

jump address 1 (PMJAD1)

4-104

jump address 2 (PMJAD2)

4-104

jump registers

4-103

physical dword address and data

3-5

PME

clock (PMEC)

4-16

enable (PEN)

4-17

status (PST)

4-16

support (PMES)

4-15

pointer SCRIPTS (PSCPT)

4-82

polling

2-37

power

and ground signals

3-13

management

2-51

state (PWS[1:0])

4-17

state D0

2-52

state D1

2-52

state D2

2-53

state D3

2-53

prefetch

enable (PFEN)

4-70

flush

2-22

flush (PFF)

4-70

SCRIPTS instructions

2-21

pull-ups, internal, conditions

3-3

R

RAM

see also SCRIPTS

RAM

2-18

read

line

2-10

function

2-7

modify-write cycles

5-23

multiple

2-7

multiple with read line enabled

2-7

write instructions

5-22

write system memory from SCRIPTS

5-34

read/write

instructions

5-22

,

5-24

system memory from SCRIPTS

5-34

received

master abort (from master) (RMA)

4-5

target abort (from master) (RTA)

4-5

register

address

5-37

address - A[6:0]

5-23

registers

2-37

relative

5-19

relative addressing mode

5-18

,

5-29

remaining byte count (RBC)

4-105

REQ/

3-7

request

3-7

reselect

2-17

during reselection

2-33

instruction

5-14

reselected (RSL)

4-74

,

4-77

reserved

4-3

,

4-4

,

4-5

,

4-6

,

4-10

,

4-13

,

4-16

,

4-17

,

4-22

,

4-30

,

4-35

,

4-38

,

4-40

,

4-51

,

4-69

,

4-75

,

4-79

,

4-85

,

4-88

,

4-94

,

4-96

,

4-97

,

4-99

,

4-103

,

4-108

command

2-5

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