LSI 53C875A - Manual (Page 284)

6-46 Electrical Specifications
Figure 6.28 Normal/Fast Memory (
≥ =
128 Kbytes) Multiple Byte Access Write Cycle
MAD
(Driven by LSI53C875A)
MAS1/
(Driven by LSI53C875A)
MAS0/
(Driven by LSI53C875A)
MCE/
(Driven by LSI53C875A)
MOE/
(Driven by LSI53C875A)
MWE/
(Driven by LSI53C875A)
0 2 4 6 8 10 12 14
CLK
(Driven by System)
PAR
(Driven by Master-Addr;
IRDY/
(Driven by Master)
TRDY/
(Driven by LSI53C875A)
STOP/
(Driven by LSI53C875A)
DEVSEL/
(Driven by LSI53C875A)
AD
(Driven by Master-Addr;
C_BE[3:0]/
(Driven by Master)
FRAME/
(Driven by Master)
LSI53C875A-Data)
LSI53C875A-Data)
Byte Enable
Addr In
CMD
Upper
Address
Middle
Address
Lower
Address
Data In
In