LSI 53C875A - Manual (Page 310)

B-4 External Memory Interface Diagram Examples
Figure B.4 512 Kbyte Interface with 150 ns Memory
OE
WE
D[7:0]
A0
A16
.
.
.
LSI53C875A
MOE/
8
MAD[7:0]
Bus
A[7:0]
D0
CK
Q0
QE
8
A[15:8]
V
DD
MAS0/
MAS1/
Note: MAD2 pulled LOW internally. MAD bus sense logic enabled for 512 Kbytes of slow memory (150 ns
devices, additional time required for HCT139 @ 33 MHz). The HCT374s may be replaced with HCT377s.
HCT374
GPIO4
MWE/
VPP
Control
+ 12 V
VPP
Optional - for Flash Memory only, not
required for EEPROMS.
D[7:0]
MAD3 4.7 K
D0
CK
Q0
Q2
3
HCT377
MAD[2:0]
Bus
E
MAD1 4.7 K
MAD3 4.7 K
A
B
GB
Y0
Y1
Y2
Y3
MCE/
HCT139
CE CE CE CE
27C010-15/28F010-15 Sockets
D2
D7 Q7
D0
CK
Q0
QE
HCT374
D7 Q7
OE
WE
D[7:0]
A0
A16
.
.
.
OE
WE
D[7:0]
A0
A16
.
.
.
OE
WE
D[7:0]
A0
A16
.
.
.