LSI 53C875A - Manual (Page 17)

New Features in the LSI53C875A 1-3
1.1 New Features in the LSI53C875A
The LSI53C875A is a drop-in replacement for the LSI53C875 PCI to
Ultra SCSI Controller, with these additional benefits:
•
Supports 32-bit PCI Interface with 64-bit addressing.
•
Handles SCSI phase mismatches in SCRIPTS without interrupting
the CPU.
•
Supports JTAG boundary scanning.
•
Supports PC99 Power Management.
– Automatically downloads Subsystem Vendor ID, Subsystem ID,
and PCI power management levels D0, D1, D2, and D3.
•
Improves PCI bus efficiency through improved PCI caching design.
•
Transfers Load/Store data to or from 4 Kbytes of internal SCRIPTS
RAM.
Additional features of the LSI53C875A include:
•
Hardware control of SCSI activity LED.
•
32-bit ISTAT registers ( Interrupt Status Zero (ISTAT0) , Interrupt
Status One (ISTAT1) , Mailbox Zero (MBOX0) , Mailbox One
(MBOX1) ).
•
Optional 944 byte DMA FIFO supports large block transfers at Ultra
SCSI speeds. The default FIFO size of 112 bytes is also supported.
1.2 Benefits of Ultra SCSI
Ultra SCSI is an extension of the SPI-2 draft standard that allows faster
synchronous SCSI transfer rates. When enabled, Ultra SCSI performs
20 megatransfers per second. The LSI53C875A can perform 16-bit, Ultra
SCSI synchronous transfers as fast as 40 Mbytes/s. This advantage is
most noticeable in heavily loaded systems or with applications with large
block requirements, such as video on-demand and image processing.
An advantage of Ultra SCSI is that it significantly improves SCSI
bandwidth while preserving existing hardware and software investments.
The primary software changes required enable the chip to perform