Carrier Access Broadmore 1750 - Manual (Page 154)

7-40 Broadmore 1750 - Release 4.6
Configuration
OC-12c/STM-4c BITS/Timing Redundancy
OC-12c/STM-4c BITS/Timing Redundancy
Configuration of the timing options on a redundant OC-12c/STM-4c system requires
correct settings on both NIMs, the DS3 port, and the NIM redundancy screen. Either of
the Broadmore 1750 BITS inputs on NIM IOMs, in slots A and B, can be selected as
the primary clock reference. Each BITS input has an enable/disable menu option on the
coinciding OC-12c/STM-4c interface. When a condition exists that the primary
reference source is not detected, the unit will switch to the other BITS input, if a signal
is detected on that input. If a signal is not detected on the opposite BITS, the source
clock will be derived from an alternate source propagated from the NIM to the cell bus.
The source of the cell bus clock depends on the setting of the OC-12c/STM-4c transmit
timing option. Two options are available, Local/BITS and Received. The Local/BITS
option derives clock from the on-board internal oscillator. The received option derives
clock from the received SONET stream.
1. Follow the sequence below to set the redundancy primary BITS clock to either
A or B.
Select Maintenance/Diags
↵
Select Redundancy
↵
Select NIM
↵
Select Primary BITS
↵
Choose A or B
In the case of a single BITS clock, select it as the
primary source (NIM A or NIM B).