Carrier Access Broadmore 1750 User Manual
Page 156
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Broadmore 1750 - Release 4.6
Configuration
OC-12c/STM-4c BITS/Timing Redundancy
The recommended configuration for maximum clocking stability is:
1. Connect BITS sources to NIM I/O A and NIM I/O B.
2. Select a Primary Reference Source (A or B), and then enable the clock loss
alarm menu option on each OC-12c/STM-4c.
3. Configure the DS3 SAM to BITS clock mode.
The equipment connected to the Broadmore 1750 OC-12c/STM-4c interface is
configured to BITS and provides a BITS reference clock embedded in the
SONET serial stream.
4. The Broadmore 1750 OC-12c/STM-4c Transmit timing option is set to
recovered.
In effect, the Broadmore 1750 OC-12c/STM-4c is loop timed off of the
associated SONET device. Configuring the equipment in this manner allows
the DS3 SAM to fallback on a clock derived from the associated SONET
equipment’s BITS, in the event of a BITS clock failure.