Packed shuffle word for 128-bit registers, Packed shuffle word for 128-bit registers -19, Example 4-12 – Intel ARCHITECTURE IA-32 User Manual

Page 239: Broadcast using 2 instructions -19, Example 4-11, Pshuf instruction code -19

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Packed shuffle word for 128-bit registers, Packed shuffle word for 128-bit registers -19, Example 4-12 | Broadcast using 2 instructions -19, Example 4-11, Pshuf instruction code -19 | Intel ARCHITECTURE IA-32 User Manual | Page 239 / 568 Packed shuffle word for 128-bit registers, Packed shuffle word for 128-bit registers -19, Example 4-12 | Broadcast using 2 instructions -19, Example 4-11, Pshuf instruction code -19 | Intel ARCHITECTURE IA-32 User Manual | Page 239 / 568
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