Related documentation – Intel ARCHITECTURE IA-32 User Manual

Page 27

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Introduction

xxvii

Related Documentation

For more information on the Intel architecture, specific techniques, and
processor architecture terminology referenced in this manual, see the
following documents:

•

Intel

®

C++ Compiler User’s Guide

•

Intel

®

Fortran Compiler User’s Guide

•

VTune Performance Analyzer online help

•

Intel

®

Architecture Software Developer’s Manual:

— Volume 1: Basic Architecture, doc. number 253665

— Volume 2A: Instruction Set Reference Manual A-M, doc.

number 253666

— Volume 2B: Instruction Set Reference Manual N-Z, doc.

number 253667

— Volume 3: System Programmer’s Guide, doc. number 253668

•

Intel Processor Identification with the CPUID Instruction, doc.
number 241618.

•

Developing Multi-threaded Applications: A Platform Consistent
Approach
, available at
http://cache-www.intel.com/cd/00/00/05/15/51534_developing_mul
tithreaded_applications.pdf

Also, refer to the following Application Notes:

•

Adjusting Thread Stack Address To Improve Performance On Intel
Xeon MP Hyper-Threading Technology Enabled Processors

•

Detecting Hyper-Threading Technology Enabled Processors

•

Using Spin-Loops on Intel Pentium 4 Processor and Intel Xeon
Processor MP

In addition, refer to publications in the following web sites:

•

http://developer.intel.com/technology/hyperthread

•

http://cedar.intel.com/cgi-bin/ids.dll/topic.jsp?catCode=CDN

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