Intel ARCHITECTURE IA-32 - Manual (Page 38)

IA-32 Intel® Architecture Optimization
1-10
The out-of-order core aggressively reorders µops so that µops whose
inputs are ready (and have execution resources available) can execute as
soon as possible. The core can issue multiple µops per cycle.
The retirement section ensures that the results of execution are
processed according to original program order and that the proper
architectural states are updated.
Figure 1-3 illustrates a diagram of the major functional blocks
associated with the Intel NetBurst microarchitecture pipeline. The
following subsections provide an overview for each.
Figure 1-3 The Intel NetBurst Microarchitecture
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