Intel ARCHITECTURE IA-32 - Manual (Page 152)

IA-32 Intel® Architecture Optimization
2-80
Prefixes and Instruction Decoding
An IA-32 instruction can be up to 15 bytes in length. Prefixes can
change the length of an instruction that the decoder must recognize. In
some situations, using a length-changing prefix (LCP) causes extra
delay in decoding the instruction.
The prefixes that change the length of a instruction include
• Operand size prefix (0x66)
• Address size prefix (0x67)
Only in some situations does the use of a length-changing prefix
actually cause the length of an instruction to change (the prefix itself is
not considered as contributing to a change in instruction length in this
respect).
For example, the instruction “xor eax,0xffff” is encoded as (35 FF FF 00
00) in 32-bit code; while overriding the default operand size with 0x66
results in the instruction “xor ax,0xffff”, which is encoded as (66 35 FF
FF). Use of an LCP causes a change in the number of bytes to encode
the displacement operand in the instruction.
On Pentium M, Intel Core Solo and Intel Core Duo processors; the
following situation causes extra delays when decoding an instruction
with an LCP:
• Processing an instruction with its length affected by the presence of
a Length Changing Prefix (LCP)
Situations for which the presence of operand-size override prefix (0x66)
does not change the length of a instruction are:
• Processing an instruction in a subset which the 0x66 prefix does not
change instruction length. The instructions that may experience this
penalty include: neg, not, mul, imul, div, idiv, and test with the
opcode byte encoding of 0xF7.