Intel ARCHITECTURE IA-32 - Manual (Page 241)

Optimizing for SIMD Integer Applications
4
4-21
Data Movement
There are two additional instructions to enable data movement from the
64-bit SIMD integer registers to the 128-bit SIMD registers.
The movq2dq instruction moves the 64-bit integer data from an MMX
register (source) to a 128-bit destination register. The high-order 64 bits
of the destination register are zeroed-out.
The movdq2q instruction moves the low-order 64-bits of integer data
from a 128-bit source register to an MMX register (destination).
Conversion Instructions
New instructions have been added to support 4-wide conversion of
single-precision data to/from double-word integer data. Also,
conversions between double-precision data and double-word integer
data have been added.
Generating Constants
The SIMD integer instruction sets do not have instructions that will load
immediate constants to the SIMD registers. The following code
segments generate frequently used constants in the SIMD register. Of
course, you can also put constants as local variables in memory, but
when doing so be sure to duplicate the values in memory and load the
values with a
movq , movdqa , or movdqu instructions, see Example 4-15.
Example 4-15 Generating Constants
pxor MM0, MM0 ; generate a zero register in MM0
pcmpeq MM1, MM1 ; Generate all 1's in register MM1,
; which is -1 in each of the packed
; data type fields
continued