Intel ARCHITECTURE IA-32 - Manual (Page 228)

IA-32 Intel® Architecture Optimization
4-8
Interleaved Pack with Saturation
The pack instructions pack two values into the destination register in a
predetermined order. Specifically, the
packssdw instruction packs two
signed doublewords from the source operand and two signed
doublewords from the destination operand into four signed words in the
destination register as shown in Figure 4-1.
Example 4-3 Signed Unpack Code
; Input:
; MM0 source value
; Output:
; MM0 two sign-extended 32-bit doublewords
; from the two low-end words
; MM1 two sign-extended 32-bit doublewords
; from the two high-end words
;
movq MM1, MM0 ; copy source
punpcklwd MM0, MM0 ; unpack the 2 low end words of the source
; into the second and fourth words of the
; destination
punpckhwd MM1, MM1 ; unpack the 2 high-end words of the source
; into the second and fourth words of the
; destination
psrad MM0, 16 ; sign-extend the 2 low-end words of the
source
; into two 32-bit signed doublewords
psrad MM1, 16 ; sign-extend the 2 high-end words of the
; source into two 32-bit signed doublewords