Intel ARCHITECTURE IA-32 User Manual
Page 530
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IA-32 Intel® Architecture Optimization
C-16
Table C-7
IA-32 x87 Floating-point Instructions
Instruction
Latency
1
Throughput
Execution
Unit
2
CPUID
0F3n
0F2n
0x69n
0F3n
0F2n
0x69n 0F2n
FABS
3
2
1
1
FP_MISC
FADD
6
5
1
1
FP_ADD
FSUB
6
5
1
1
FP_ADD
FMUL
8
7
2
2
FP_MUL
FCOM
3
2
1
1
FP_MISC
FCHS
3
2
1
1
FP_MISC
FDIV Single Precision
30
23
30
23
FP_DIV
FDIV Double Precision
40
38
40
38
FP_DIV
FDIV Extended
Precision
44
43
44
43
FP_DIV
FSQRT SP
30
23
30
23
FP_DIV
FSQRT DP
40
38
40
38
FP_DIV
FSQRT EP
44
43
44
43
FP_DIV
F2XM1
4
100-
200
90-
150
60
FCOS
4
180-
280
190-
240
130
FPATAN
4
220-
300
150-
300
140
FPTAN
4
240-
300
225-
250
170
FSIN
4
160-
200
160-
180
130
FSINCOS
4
170-
250
160-
220
140
FYL2X
4
100-
250
140-
190
85
FYL2XP1
4
140-
190
85
continued
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