Miscellaneous, Nops, Miscellaneous -95 – Intel ARCHITECTURE IA-32 User Manual
Page 167: Nops -95
General Optimization Guidelines
2
2-95
User/Source Coding Rule 19. (M impact, ML generality) Avoid the use of
conditional branches inside loops and consider using SSE instructions to
eliminate branches.
User/Source Coding Rule 20. (M impact, ML generality) Keep induction
(loop) variables expressions simple.
Miscellaneous
This section explains separate guidelines that do not belong to any
category described above.
NOPs
Code generators generate a no-operation (NOP) to align instructions.
The NOPs are recommended for the following operations:
•
1-byte:
xchg
EAX
,
EAX
•
2-byte:
mov
reg
,
reg
•
3-byte:
lea
reg
, 0 (
reg
) (8-bit displacement)
•
6-byte:
lea
reg
, 0 (
reg
) (32-bit displacement)
These are all true NOPs, having no effect on the state of the machine
except to advance the EIP. Because NOPs require hardware resources to
decode and execute, use the least number of NOPs to achieve the
desired padding.
The one byte NOP,
xchg
EAX
,
EAX
, has special hardware support.
Although it still consumes a
μ
op and its accompanying resources, the
dependence upon the old value of
EAX
is removed. Therefore, this
μ
op
can be executed at the earliest possible opportunity, reducing the
number of outstanding instructions. This is the lowest cost NOP
possible.