Writebacks (dirty evictions) – Intel ARCHITECTURE IA-32 User Manual

Page 466

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IA-32 Intel® Architecture Optimization

B-12

IOQ_allocation, IOQ_active_entries: 64 bytes for hits or misses,
smaller for partials' hits or misses

Writebacks (dirty evictions)

BSQ_cache_reference: 64 bytes

BSQ_allocation: 64 bytes

BSQ_active_entries: 64 bytes

IOQ_allocation, IOQ_active_entries: 64 bytes

The count of IOQ allocations may exceed the count of corresponding
BSQ allocations on current implementations for several reasons,
including:

Partials:

In the FSB IOQ, any transaction smaller than 64 bytes is broken up
into one to eight partials, each being counted separately as a or one
to eight-byte chunks. In the BSQ, allocations of partials get a count
of one. Future implementations will count each partial individually.

Different transaction sizes:

The allocations of non-partial programmatic load requests get a
count of one per 128 bytes in the BSQ on current implementations,
and a count of one per 64 bytes in the FSB IOQ. The allocations of
RFOs get a count of 1 per 64 bytes for earlier processors and for the
FSB IOQ (This granularity may change in future implementations).

Retries:

If the chipset requests a retry, the FSB IOQ allocations get one count
per retry.

There are two noteworthy cases where there may be BSQ allocations
without FSB IOQ allocations. The first is UC reads and writes to the
local XAPIC registers. Second, if a cache line is evicted from the
2nd-level cache but it hits in the on-die 3rd-level cache, then a BSQ
entry is allocated but no FSB transaction is necessary, and there will be
no allocation in the FSB IOQ. The difference in the number of write

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