Texas Instruments MSP430x4xx - Manual (Page 105)

Instruction Set
3-71 RISC 16−Bit CPU
XOR[.W] Exclusive OR of source with destination
XOR.B Exclusive OR of source with destination
Syntax XOR src,dst or XOR.W src,dst
XOR.B src,dst
Operation src .XOR. dst −> dst
Description The source and destination operands are exclusive ORed. The result is placed
into the destination. The source operand is not affected.
Status Bits N: Set if result MSB is set, reset if not set
Z: Set if result is zero, reset otherwise
C: Set if result is not zero, reset otherwise ( = .NOT. Zero)
V: Set if both operands are negative
Mode Bits OSCOFF, CPUOFF, and GIE are not affected.
Example The bits set in R6 toggle the bits in the RAM word TONI.
XOR R6,TONI ; Toggle bits of word TONI on the bits set in R6
Example The bits set in R6 toggle the bits in the RAM byte TONI.
XOR.B R6,TONI ; Toggle bits of byte TONI on the bits set in
; low byte of R6
Example Reset to 0 those bits in low byte of R7 that are different from bits in RAM byte
EDE.
XOR.B EDE,R7 ; Set different bit to “1s”
INV.B R7 ; Invert Lowbyte, Highbyte is 0h