Texas Instruments MSP430x4xx - Manual (Page 75)

Instruction Set
3-41 RISC 16−Bit CPU
* INC[.W ] Increment destination
* INC.B Increment destination
Syntax INC dst or INC.W dst
INC.B dst
Operation dst + 1 −> dst
Emulation ADD #1,dst
Description The destination operand is incremented by one. The original contents are lost.
Status Bits N: Set if result is negative, reset if positive
Z: Set if dst contained 0FFFFh, reset otherwise
Set if dst contained 0FFh, reset otherwise
C: Set if dst contained 0FFFFh, reset otherwise
Set if dst contained 0FFh, reset otherwise
V: Set if dst contained 07FFFh, reset otherwise
Set if dst contained 07Fh, reset otherwise
Mode Bits OSCOFF, CPUOFF, and GIE are not affected.
Example The status byte, STATUS, of a process is incremented. When it is equal to 11,
a branch to OVFL is taken.
INC.B STATUS
CMP.B #11,STATUS
JEQ OVFL