Texas Instruments MSP430x4xx - Manual (Page 397)

ADC12 Registers
20-21 ADC12
ADC12CTL0, ADC12 Control Register 0
15 14 13 12 11 10 9 8
SHT1x SHT0x
rw−(0) rw−(0) rw−(0) rw−(0) rw−(0) rw−(0) rw−(0) rw−(0)
7 6 5 4 3 2 1 0
MSC REF2_5V REFON ADC12ON ADC12OVIE
ADC12
TOVIE
ENC ADC12SC
rw−(0) rw−(0) rw−(0) rw−(0) rw−(0) rw−(0) rw−(0) rw−(0)
Modifiable only when ENC = 0
SHT1x Bits
15-12 Sample-and-hold time. These bits define the number of ADC12CLK cycles in
the sampling period for registers ADC12MEM8 to ADC12MEM15.
SHT0x Bits
11-8 Sample-and-hold time. These bits define the number of ADC12CLK cycles in
the sampling period for registers ADC12MEM0 to ADC12MEM7.
SHTx Bits ADC12CLK cycles
0000 4
0001 8
0010 16
0011 32
0100 64
0101 96
0110 128
0111 192
1000 256
1001 384
1010 512
1011 768
1100 1024
1101 1024
1110 1024
1111 1024