Sample-and-hold, Figure 24−4. analog input equivalent circuit – Texas Instruments MSP430x4xx User Manual

Page 468

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Scan IF Operation

24-8

Scan IF

Sample-And-Hold

The sample-and-hold is used to sample the sensor voltage to be measured.
The sample-and-hold circuitry is shown in Figure 24−3. When SIFSH = 1 and
SIFTEN = 0 the sample-and-hold circuitry is enabled and the excitation
circuitry and mid-voltage generator are disabled. The sample-and-hold is used
for resistive dividers or for other analog signals that should be sampled.

Up to four resistor dividers can be connected to SIFCHx and SIFCOM. AV

CC

and SIFCOM are the common positive and negative potentials for all
connected resistor dividers. When SIFEX(tsm) = 1, SIFCOM is connected to
SIFV

SS

allowing current to flow through the dividers. This charges the

capacitors of each sample-and-hold circuit to the divider voltages. All resistor
divider channels are sampled simultaneously. When SIFEX(tsm) = 0 the
sample-and-hold capacitor is disconnected from the resistor divider and
SIFCOM is disconnected from SIFV

SS

. After sampling, each channel can be

measured sequentially using the channel select logic, the comparator, and the
DAC.

The selected SIFCHx input can be modeled as an RC low-pass filter during
the sampling time t

sample

, as shown below in Figure 24−4. An internal MUX-on

input resistance Ri

(SIFCHx)

(max. 3 k

) in series with capacitor C

SCH(SIFCHx)

(max. 7 pF) is seen by the resistor-divider. The capacitor voltage V

C

must be

charged to within

½

LSB of the resistor divider voltage for an accurate 10-bit

conversion. See the device-specific datasheet for parameters.

Figure 24−4. Analog Input Equivalent Circuit

Ri

(SIFCHx)

V

C

MSP430

C

SHC(SIFCHx)

V

I

V

I

= Input voltage at pin SIFCHx

V

S

= External source voltage

R

S

= External source resistance

Ri

(SIFCHx)

= Internal MUX-on input resistance

C

ISHC(SIFCHx)

= Input capacitance

V

C

= Capacitance-charging voltage

R

S

V

S

The resistance of the source R

S

and Ri

(SIFCHx)

affect t

sample

.The following

equation can be used to calculate the minimum sampling time t

sample

for a

10-bit conversion:

t

sample

u

(R

S

)

Ri

SIFCHx

)

ln(211)

C

SHC(SIFCHx)

(1)

Substituting the values for R

I

and C

I

given above, the equation becomes:

t

sample

u

(R

S

)

3k)

7.625

7pF

(2)

For example, if R

S

is 10 k

, t

sample

must be greater than 684 ns.

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